[Help]Full Text[Boolean Search][Advanced][Number Search][Order Copy][PTDLs]

[Previous Patent] [Next Patent] [Back to List]
(5 of 54)

United States Patent 6,140,877
Forbes Oct. 31, 2000

Low power supply CMOS differential amplifier topology


A structure and method for improving differential amplifier operation is provided. High performance, wide bandwidth or very fast CMOS amplifiers are possible using the new circuit topology of the present invention. The differential amplifier of the present invention employs a novel common mode feedback circuit to back bias the body regions of the amplifying transistors in the differential amplifier. The novel configuration is achieved entirely using CMOS fabrication techniques and delivers high performance in both amplifier gain (G) and frequency response (fT) characteristics using a 1 micron (1mu) CMOS technology.

Inventors: Forbes; Leonard (Corvallis, OR).
Assignee: Micron Technology, Inc. (Boise, ID).
Appl. No.: 209,330
Filed: Dec. 11, 1998
Intl. Cl. : H03F 3/45
Current U.S. Cl.: 330/258; 330/261
Field of Search: 330/253, 258, 259, 261

References Cited | [Referenced By]

U.S. Patent Documents
5,384,739Jan., 1995Keeth 365/189.09
5,508,604Apr., 1996Keeth 323/314
5,699,015Dec., 1997Dotson et al. 330/255
5,835,411Nov., 1998Briner 365/185.21
5,838,200Nov., 1998Opris 330/258
5,841,317Nov., 1998Ohmori et al. 327/563
5,862,077Jan., 1999Briner 365/185.21
5,959,492Sept., 1999Khoury et al. 327/389
6,040,720Mar., 2000Kosiec 327/83
6,043,689Mar., 2000Sheets, II et al. 327/108
6,043,718Mar., 2000Diniz et al. 331/57

Other References

Ferri, G., et al., "A Low-Voltage Fully Differential Constant-Gm Rail-to-Rail CMOS Operational Amplifier", Analog Integrated Circuits and Signal Processing, 16 (1), pp. 5-15, (1998).

Ferri, G., et al., "SP 24.1: A 1.3V Op/amp in Standard 0.7 micrometer CMOS with Constant g and Rail-to-Rail Input and Output Stages", IEEE International Solid-State Circuits Conference, pp. 382-383, (1996).

Griffith, R., et al., "SA 21.4: A 1V BiCMOS Rail-to-Rail Amplifier with n-Channel Depletion-Mode Input Stage", IEEE International Solid-State Circuits Conference, Digest of Technical Papers, First Edition, Volume 40, pp. 352-3, 484, 52, (1997).

Knee, D. L. et al., "General-Purpose 3V CMOS Operational Amplifier with a New Constant-Transconductance Input Stage", Hewlett-Packard Journal, pp. 114-120, ( Aug. 1997).

Kuge, S., et al., "SOI-DRAM Circuit Technologies for Low Power High Speed Multigiga Scale Memories", IEEE Journal of Solid-State Circuits, 31 (4), 586-591, (Apr. 1996).

Suma, K., et al., "An SOI-DRAM with Wide Operating Voltage Range by CMOS/SIMOX Technology", IEEE Journal of Solid-State Circuits, 29 (11), 1323-1329, (Nov. 1994).

Primary Examiner: Pascal; Robert
Assistant Examiner: Choe; Henry
Attorney, Agent or Firm: Schwegman, Lundberg, Woessner & Kluth, P.A.
69 Claims, 12 Drawing Figures

[Previous Patent] [Next Patent] [Back to List]
(5 of 54)