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United States Patent 6,141,260
Ahn, et. al. Oct. 31, 2000

Single electron resistor memory device and method for use thereof


A method of operating a memory cell formed from semiconductor material by storing data represented by one or more electrons in islands of conductive material that are situated in anodically-defined pores formed in the semiconductor material. The islands are insulated from the semiconductor material by dielectric material. The memory cell storing the data is accessed, and an electrical parameter that is manifested in response to a stimulus is sampled. Based on the sample of the electrical parameter, it is determined whether one or more electrons are stored by the memory cell.

Inventors: Ahn; Kie Y. (Chappapua, NY); Forbes; Leonard (Corvallis, OR).
Assignee: Micron Technology, Inc. (Boise, ID).
Appl. No.: 141,767
Filed: Aug. 27, 1998
Intl. Cl. : G11C 16/04
Current U.S. Cl.: 365/189.07; 865/185.22
Field of Search: 365/189.07, 185.22, 185.28, 185.18, 185.01

References Cited | [Referenced By]

U.S. Patent Documents
5,485,595Jan., 1996Assar et al. 395/430
5,621,687Apr., 1997Doller 365/185.29
5,708,605Jan., 1998Sato 365/185.29
5,731,598Mar., 1998Kado et al. 257/30
5,740,104Apr., 1998Forbes 365/185.03
5,754,477May, 1998Forbes 365/185.33

Other References

Lingjie Guo et al., "A room-temperature silicon single-electron metal-oxide-semiconductor memory with nanoscale floating-gate and ultranarrow channel," Apply. Phys. Lett. 70(7):850-852, Feb. 1997.

Lingjie Guo et al., "Fabrication and characterization of room temperature silicon single electron memory," J. Vac. Sci. Technol. B 15 (6):2840-2843, Nov./Dec. 1997.

Rodrigo Martins et al., "Transport properties of doped silicon oxycarbide microcrystalline films produced by spatial separation techniques," Solar Energy Materials and Solar Cells 41/42:493-517, 1996.

Anri Nakajima et al., "Room Temperature Operation of Si Single-Electron Memory with Self-Aligned Floating Dot Gate," IEDM 96, pp. 952-954, 1996.

Anri Nakajima et al., "Room Temperature Operation of Si Single-Electron Memory with Self-Aligned Floating Dot Gate," Appl. Phys. Lett. (70)13:1742-1744, Mar. 1997.

Anri Nakajima et al., "Si single electron tunneling transistor with nanoscale floating dot stacked on a Coulomb island by self-aligned process," Appl. Phys. Lett. 71(3):353-355, Jul. 1997.

Sandip Tiwari et al., "Single charge and confinement effects in nano-crystal memories," Appl. Phys. Lett. 69(9):1232-1234, Aug. 1996.

Hussein I. Hanafi, "Fast and Long Retention-Time Nano-Crystal Memory," IEEE Transactions on Electron Devices 43(9):1553-1558, Sep. 1996.

G. Craciun et al., "On the morphology of porous silicon layers obtained by electrochemical method," 1995 International Semiconductor Conference, 18th Edition, pp. 331-334, Oct. 1995.

Tomoyuki Ishii et al., "A 3-D Single-Electron-Memory Cell Structure with 2F(^2) per bit," IEDM, pp. 924-926, 1997.

K. Yano et al., Single-Electron-Memory Integrated Circuit for Giga-to-Tera Bit Storage, ISSCC Digest of Technical Papers, pp. 266-267, Feb. 1996.

K. Yano et al., "A 128Mb Early Prototype for Gigascale Single-Electron Memories," ISSCC Digest of Technical Papers, pp. 344-345., Feb. 1998.

Haroon Ahmed and Kazuo Nakazato, "Single-electron devices," Microelectronic Engineering 32:297-315, 1996.

Haroon Ahmed, "Single electron electronics: Challenge for nanofabrication," J. Vac. Sci. Technol. B. 15(6):2101, 2108, Nov./Dec. 1997.

Tomoyuki Ishii, "Verify: Key to the Stable Single-Electron-Memory Operation," IEDM, pp. 171-174, 1997.

Valery M. Dubin, "Formation mechanism of porous silicon layers obtained by anodization of monocrystalline n-type silicon in HF solutions," Surface Science 274:82-92, 1992.

Jian-Shing Luo and Wen-Tai Lin, "Localized epitaxial growth of hexagonal and cubic SiC films on Si by vacuum annealing," Appl. Phys. Lett. 69(7):916-918, Aug. 1996.

Donato Montanari et al., "Novel Level-Identifying Circuit for Flash Multilevel Memories," IEEE Journal of Solid-State Circuits 35(7):1090-1095, Jul. 1998.

Nae-In Lee et al., "Highly Reliable Polysilicon Oxide Grown by Electron Cyclotron Resonance Nitrous Oxide Plasma," IEEE Electron Device Letters 18(10):486-488, Oct. 1997.

Masato Tarakomori and Hideaki Ikoma, "Low-Temperature Si Oxidation Using Inductively Coupled Oxygen-Argon Mixed Plasma," Jpn. J. Appl. Phys. 36:5409-5415, 1997.

Jin-Woo Lee et al., "Oxidation of Silicon Using Electron Cyclotron Resonance Nitrous Oxide Plasma and Its Application to Polycrystalline Silicon Thin Film Transistors," Journal of the Electrochemical. Society 144(9):3283-3287, Sep. 1997.

W.S. Park et al, "Growth of polycrystalline silicon at low temperture on hydrogenated microcrystalline silicon seed layer," Mat. Res. Soc. Symp. Proc. 467:403-408, 1997.

T. Nishimiya et al., "Novel Plasma Control Method in PECVD for Preparing Micro-crystalline Silicon," Mat. Res. Soc. Symp. Proc. 467:397-401, 1997.

Constantin Papadas et al., "Modeling of the Intrinsic Retention Characteristics of FLOTOX EEPROM Cells Under Elevated Temperatre Conditions," IEEE Transactions on Electron Devices 42(4):678-682, Apr. 1995.

Brian Dipert and Lou Hebert, "Flash memory goes mainstream," IEEE Spectrum, pp. 48-52, Oct. 1993.

Joao Pedro Conde et al., "Amorphous and Microcrystalline Silicon Deposited by Low-Power Electron-Cyclotron Resonance Plasma-Enhanced Chemical-Vapor Deposition," Japanese Journal of Applied Physics 36:38-49, Jan. 1997.

D.M. Wolfe et al., "Low-Temperature (450 deg. C) Poly-Sci Thin Film Deposition on SiO(2) and Glass Using a Microcrystalline-Si Seed Layer," Mat. Res. Soc. Symp. Proc. 472:427-432, 1997.

Yasuo Tarui, "Flash Memory Features Simple Structure, Superior Integration," JEEE 30:84-87, Sep. 1993.

Primary Examiner: Nelms; David
Assistant Examiner: Ho; Hoai V.
Attorney, Agent or Firm: Dorsey & Whitney LLP
16 Claims, 19 Drawing Figures

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