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| United States Patent | 6,143,616 |
| Geusic, et. al. | Nov. 7, 2000 |
Abstract
Methods of forming integrated circuitry lines such as coaxial integrated circuitry interconnect lines, and related integrated circuitry are described. An inner conductive coaxial line component is formed which extends through a substrate. An outer conductive coaxial line component and coaxial dielectric material are formed, with the coaxial dielectric material being formed operably proximate and between the inner and outer conductive coaxial line components. In a preferred implementation, the substrate includes front and back surfaces, and a hole is formed which extends through the substrate and between the front and back surfaces. In one implementation, the outer conductive coaxial line component constitutes doped semiconductive material. In another implementation, such constitutes a layer of metal-comprising material. A layer of dielectric material is formed over and radially inwardly of the outer line component. Conductive material is then formed over and radially inwardly of the dielectric material layer. The latter conductive material constitutes an inner conductive coaxial line component. In a preferred implementation, the inner conductive coaxial line component is formed by forming a first material within the hole. A second conductive material is formed over the first material. Subsequently, the substrate is exposed to conditions which are effective to cause the second material to replace the first material.
| Inventors: | Geusic; Joseph E. (Berkeley Heights, NJ); Ahn; Kie Y. (Chappaqua, NY); Forbes; Leonard (Corvallis, OR). |
| Assignee: | Micron Technology, Inc. (Boise, ID). |
| Appl. No.: | 917,449 |
| Filed: | Aug. 22, 1997 |
| Intl. Cl. : | H01L 21/20 |
| Current U.S. Cl.: | 438/389; 438/542; 438/667; 438/668 |
| Field of Search: | 438/611, 675, 108, 667, 514, 524, 389, 542, 668 |
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