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United States Patent 6,165,828
Forbes, et. al. Dec. 26, 2000

Structure and method for gated lateral bipolar transistors

Abstract

An improved structure and method for gated lateral bipolar transistors is provided. The present invention capitalizes on opposing sidewall structures and adjacent conductive sidewall members to conserve available surface space on the semiconductor chips. The conserved surface space allows a higher density of structures per chip. The conductive sidewall members couple to the gate of the gated lateral bipolar transistor and, additionally, to a retrograded, more highly doped bottom layer. The improved structure provides for both metal-oxide semiconductor (MOS) type conduction and bipolar junction transistor (BJT) type conduction beneath the gate of the gated lateral bipolar transistor.


Inventors: Forbes; Leonard (Corvallis, OR); Noble; Wendell P. (Milton, VT).
Assignee: Micron Technology, Inc. (Boise, ID).
Appl. No.: 144,811
Filed: Sept. 1, 1998

Related U.S. Application Data
Division of Ser No. 50,266, Mar. 30, 1998, Pat. No. 6,075,272.
Intl. Cl. : H01L 21/8249
Current U.S. Cl.: 438/234; 438/309; 438/348; 438/351
Field of Search: 438/308, 309, 267, 202, 234, 235, 236, 351, 348

References Cited | [Referenced By]

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5,973,356Oct., 1999Noble et al. 257/319

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Primary Examiner: Niebling; John F.
Assistant Examiner: Lattin; Christopher
Attorney, Agent or Firm: Schwegman, Lundberg, Woessner & Kluth, P.A.
20 Claims, 14 Drawing Figures

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