|( 2 of 100 )|
|United States Patent||6,245,615|
|Noble ,   et al.||June 12, 2001|
Improved methods and structures are provided that are lateral to surfaces with a (110) crystal plane orientation such that an electrical current of such structures is conducted in the <110> direction. Advantageously, improvements in hole carrier mobility of approximately 50% can be obtained by orienting the structure's channel in a (110) plane such that the electrical current flow is in the <110> direction. Moreover, these improved methods and structures can be used in conjunction with existing fabrication and processing techniques with minimal or no added complexity. Embodiments of a method of forming an integrated circuit include forming a trench in a silicon wafer. A trench wall of the trench has a (110) crystal plane orientation. A semiconductor device is also formed lateral to the trench wall such that the semiconductor device is capable of conducting an electrical current in a <110> direction. One method of the present invention provides for forming an integrated circuit. One method includes forming an integrated circuit including an array of MOSFETs and another method includes forming an integrated circuit including a number of lateral transistors. The present invention also includes structures as well as systems incorporating such structures all formed according to the methods provided in this application.
|Inventors:||Noble; Wendell P. (Milton, VT); Forbes; Leonard (Corvallis, OR); Reinberg; Alan R. (Westport, CT)|
|Assignee:||Micron Technology, Inc. (Boise, ID)|
|Filed:||August 31, 1999|
|Current U.S. Class:||438/270; 438/150; 438/156; 438/198; 438/212; 438/269; 438/270; 438/335; 438/337; 438/973|
|Intern'l Class:||H01L 021/336; H01L 021/331; H01L 021/823.4; H01L 021/823.8; H01L 021/008.4|
|Field of Search:||438/150,156,198,206,212,269,270,335,337,973|
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|6097065||Aug., 2000||Forbes et al.||257/350.|
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