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|United States Patent||6,255,852|
|Forbes ,   et al.||July 3, 2001|
This invention provides a structure and method for improved transmission line operation on integrated circuits. A first embodiment of this invention provides a current mode signaling technique over transmission lines formed having a lower characteristic impedance than conventional CMOS transmission lines. The low impedance transmission lines of the present invention are more amenable to signal current interconnections over longer interconnection lines. An interconnection on an integrated circuit is described in which a first end of a transmission line is coupled to a driver. The transmission line is terminated at a second end with a low input impedance CMOS technology. In one embodiment, the low input impedance CMOS technology is a current sense amplifier which is input impedance matched to the transmission line. This minimizes reflections and ringing, cross talk and noise as well as allows for a very fast interconnection signal response. A second embodiment of the present invention includes a novel current sense amplifier in which feedback is introduced to lower the input impedance of the current sense amplifier. In this embodiment, the novel current sense amplifier is employed together with the current signaling technique of the present invention. The novel low input impedance CMOS circuit described here provides an improved and efficiently fabricated technique for terminating low impedance transmission lines on CMOS integrated circuits.
|Inventors:||Forbes; Leonard (Corvallis, OR); Ahn; Kie Y. (Chappaqua, NY)|
|Assignee:||Micron Technology, Inc. (Boise, ID)|
|Filed:||February 9, 1999|
|Current U.S. Class:||326/86; 326/30|
|Intern'l Class:||H03K 017/16|
|Field of Search:||326/83,86,30 327/57,313,316|
|5128962||Jul., 1992||Kerslake et al.||326/90.|
|5811984||Sep., 1998||Long et al.||326/30.|
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