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United States Patent | 6,541,362 |
Forbes ,   et al. | April 1, 2003 |
One aspect of the invention encompasses a method of forming a semiconductor structure. A patterned line is formed to comprise a first layer and a second layer. The first layer comprises silicon and the second layer comprises a metal. The line has at least one sidewall edge comprising a first-layer-defined portion and a second-layer-defined portion. A third layer is formed along the at least one sidewall edge. The third layer comprises silicon and is along both the first-layered-defined portion of the sidewall edge and the second-layered-defined portion of the sidewall edge. The silicon of the third layer is reacted with the metal of the second layer to form a silicide along the second-layer-defined portion of the sidewall edge. The silicon of the third layer is removed to leave the silicon of the first layer, the metal of the second layer, and the silicide.
Inventors: | Forbes; Leonard (Corvallis, OR); Ahn; Kie Y. (Chappaqua, NY); Tran; Luan C. (Meridian, ID) |
Assignee: | Micron Technology, Inc. (Boise, ID) |
Appl. No.: | 062892 |
Filed: | January 30, 2002 |
Current U.S. Class: | 438/596; 257/E21.2; 257/E21.209; 257/E29.152; 438/592; 438/689; 438/721 |
Intern'l Class: | H01L 021/44 |
Field of Search: | 438/592,596,630,631,648,649,682,689,721 |
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