A model for the channel noise of MESFETs including hot electron effects Forbes, L.; Yan, K.T.; Taylor, S.S. Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA Microelectronics Reliability , vol.39, no.12 , Page: 1773-86 Publisher: Elsevier , Dec. 1999 Language: English Abstract: Noise is an important consideration in the reliability of microelectronic circuits, determining the sensitivity of the circuits and placing a lower limit on the regions of operation. Proper modeling of noise in integrated circuits is essential for reliable operation. A derivation is given for the channel noise coefficient of FETs operating in the saturation region. Some simple approximations are made for hot electron effects which can be incorporated into the derivation and accounted for by a numerical integration technique. Experimental results of measured and calculated noise coefficients are compared for depletion mode MESFETs of different gate lengths. This model gives a much more realistic representation of the channel noise coefficients for short gate length devices rather than the simple 2/3 value currently used in circuit simulations. (17 References) Subjects: circuit simulation gallium arsenide III-V semiconductors Schottky gate field effect transistors semiconductor device measurement semiconductor devicemodels semiconductor device noise semiconductor device reliability Practical Theoretical channel noise model MESFETs hot electron effects noise reliability microelectronic circuits sensitivity IC operating regions IC noise modeling integrated circuits reliable operation channel noise coefficient FETs saturation region operation numerical integration technique noise coefficients depletion mode MESFETs gate length channel noise coefficients short gate length devices circuit simulations GaAs MESFETs GaAs Other field effect devices Computer-aided circuit analysis and design Semiconductor device modelling and equivalent circuits Reliability © 2000, IEE INSPEC © 2000 Institution of Electrical Engineers. All rights reserved. Dialog® File Number 2 Accession Number 6471644 1/f noise due to temperature fluctuations in heat conduction in bipolar transistors Forbes, L.; Choi, M.S.; Cao, W. Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA Microelectronics Reliability , vol.39, no.9 , Page: 1357-64 Publisher: Elsevier , Sept. 1999 Language: English Abstract: Noise is an important consideration in the reliability of microelectronic circuits and often sets a lower bound on their sensitivity and limits operation. High device temperature which result from high power operation is shown to result in an additional noise source or mechanism which can become important, become a limiting factor on circuit operation, and limit reliability. Power dissipation at high currents and voltages in bipolar transistors results in significant heat generation and heat conduction towards the heatsink. As might be expected the device temperature is only an average valueand there are, as a consequence of the diffusion equation for heat flow itself, temperature fluctuations about this average value. It is shown that these temperature fluctuations can result in 1/f noise at moderately low frequencies where these frequencies are determined by the physical dimensions over which the heat flows and the diffusion transit time. This physical phenomena is another mechanism which can be explained by the equivalent circuit representations to obtain frequency dependent solutions to the diffusion equation. The results presented here are then related to the shot noise or white noise due to the collector current allowing a determination of the 1/f noise corner frequency. (41 References) Subjects: 1/f noise bipolar transistors equivalent circuits fluctuations heat conduction semiconductor device models semiconductor device noise semiconductor device reliability thermal analysis Theoretical Experimental device 1/f noise temperature fluctuations heat conduction bipolar transistors reliability high power operation power dissipation high currents high voltages heat generation diffusion equation diffusion transit time equivalent circuit representations frequency dependent solutions shot noise white noise collector current 1/f noise corner frequency Bipolar transistors Reliability Semiconductor device modelling and equivalent circuits © 2000, IEE INSPEC © 2000 Institution of Electrical Engineers. All rights reserved. Dialog® File Number 2 Accession Number 6455653 1/f noise in electron devices due to temperature fluctuations in heat condition Forbes, L.; Choi, M.S. Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA Conference: 1996. 54th Annual Device Research Conference Digest (Cat. No.96TH8193) , Page: 46-7 Publisher: IEEE , New York, NY, USA , 1996 , 202 Pages Conference: 1996 54th Annual Device Research Conference Digest , Sponsor: IEEE Electron Devices Soc , 24-26 June 1996 , Santa Barbara, CA, USA Language: English Order from Amazon.com Abstract: It is shown that power dissipation in electron devices will result in temperature fluctuations which are frequency dependent and consequently l/f noise. As an example, application of this theory to diode and laser diodes with significant power dissipation is considered. The latter are of interest since it has been previously reported that the spectral intensity of the l/fnoise varies linearly with the applied DC current and not as is usual in most electron devices as the square of the DC voltage or current as described by Hooge's empirical relationship. We will show results on a simple diodewhere the mean square noise voltage at low frequency varies linearly with the applied DC current. The results have also been applied to describe measurements on resistive filaments in vacuum such as in light bulbs or vacuum tube devices where there is significant power dissipation and heat conduction. Temperature fluctuations in heat conduction result in l/f fluctuations in resistance of the filament. These results might well do much to clarify the long lack of understanding of l/f noise in vacuum tube devices. (3 References) Subjects: 1/f noise equivalent circuits semiconductor device models semiconductor device noise semiconductor diodes semiconductor lasers vacuum tubes Practical Theoretical 1/f noise electron devices temperature fluctuations heat condition power dissipation laser diodes spectral intensity applied DC current semiconductordiode mean square noise voltage resistive filaments vacuum tube devices Semiconductor device modelling and equivalent circuits Vacuum tubes Junction and barrier diodes Semiconductor lasers © 1996, IEE INSPEC © 2000 Institution of Electrical Engineers. All rights reserved. Dialog® File Number 2 Accession Number 5450410 A model for the 1/f noise corner frequency of FETs on semi-insulating substrates based on bulk phenomena: Theory and experiments Yan, K.T.; Forbes, L. Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA Solid-State Electronics , vol.39, no.6 , Page: 857-61 Publisher: Elsevier , June 1996 Language: English Abstract: We have developed a formula for the 1/f noise corner frequency for GaAs MESFETs. The formula is based on a new theory where the 1/f noise is a bulk phenomena with localized high frequency variations and long range low frequency fluctuations in the substrate with the lowest frequency being constrained only by the thickness of the material. The model is based on employing adistributed equivalent circuit technique in evaluating the semi-insulatingsubstrate. Preliminary results demonstrate a close consistency between modeled and measured data. (20 References) Subjects: 1/f noise equivalent circuits gallium arsenide III-V semiconductors Schottky gate field effect transistors semiconductor device models semiconductor device noise Theoretical Experimental 1/f noise corner frequency semiinsulating substrates bulk phenomena GaAs MESFET frequency fluctuations distributed equivalent circuit technique GaAs Other field effect devices Semiconductor device modelling and equivalent circuits © 1996, IEE INSPEC © 2000 Institution of Electrical Engineers. All rights reserved. Dialog® File Number 2 Accession Number 5322338 Design for and the control of the channel and 1/f noise in GaAs MESFET's Yan, K.T.; Forbes, L. Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA Conference: Proceedings of the 1995 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.95TH8113) , Page: 164-8 Editor: Ong, S.H.; Radhakrishnan, M.K. Publisher: IEEE , New York, NY, USA , 1995 , 233 Pages Conference: Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits , Sponsor: IEEE Electron Devices Soc., Natl. Univ. Singapore, Inst. Microelectron., Singapore, Magn. Technol. Centre, Singapore , 27 Nov.-1 Dec. 1995 , Singapore Language: English Order from Amazon.com Abstract: A model is given for the channel noise coefficient of FETs operating in the saturation region. Some approximations are made for hot electron effects which can be incorporated into the derivation and accounted for by a simplenumerical technique. These are then compared to experimental results. We have also developed a formula for the 1/f noise corner frequency for GaAs MESFETs. The formula is based on a new theory where the 1/f noise is a bulk phenomena with localized high frequency variations and long range low frequency fluctuations of carrier concentrations in the substrate with the lowestfrequency constrained only by the thickness of the material. Comprehensiveand new models with matching experimental data for both channel noise and 1/f noise of the GaAs MESFETs are presented. These can provide both design and testing guidelines for devices in GaAs integrated circuits which are required to meet noise and reliability specifications. (9 References) Subjects: 1/f noise carrier density equivalent circuits gallium arsenide hot carriers III-V semiconductors Schottky gate field effect transistors semiconductordevice models semiconductor device noise semiconductor device reliability Theoretical channel noise control 1/f noise control GaAs MESFET models channel noise coefficient saturation region hot electron effects 1/f noise corner frequency carrier concentrations reliability GaAs Other field effect devices Semiconductor device modelling and equivalent circuits Reliability © 1996, IEE INSPEC © 2000 Institution of Electrical Engineers. All rights reserved. Dialog® File Number 2 Accession Number 5315974 Guard ring diodes for suppression of substrate noise and improved reliability in mixed-mode CMOS circuits Forbes, L.; Lim, W.T.; Yan, K.T. Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA Conference: Proceedings of the 1995 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.95TH8113) , Page: 145-8 Editor: Ong, S.H.; Radhakrishnan, M.K. Publisher: IEEE , New York, NY, USA , 1995 , 233 Pages Conference: Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits , Sponsor: IEEE Electron Devices Soc., Natl. Univ. Singapore, Inst. Microelectron., Singapore, Magn. Technol. Centre, Singapore , 27 Nov.-1 Dec. 1995 , Singapore Language: English Order from Amazon.com Abstract: Forward biased n/sup +/ guard ring diodes are used to generate a relatively large on-chip capacitance. This variable capacitance is resonated with the normal substrate lead inductance to form a very low impedance path to ground. In this manner, substrate noise in mixed signal CMOS integrated circuits can be suppressed resulting in less noise and improved reliability in analog portions of the mixed mode circuits. (7 References) Subjects: capacitance CMOS integrated circuits integrated circuit noise integrated circuit reliability interference suppression mixed analogue-digital integrated circuits semiconductor diodes Practical Experimental guard ring diodes substrate noise suppression reliability mixed-mode CMOS circuits forward biased n/sup +/ diodes onchip capacitance variable capacitance substrate lead inductance CMOS integrated circuits Mixed analogue-digital circuits CMOS integrated circuits Reliability © 1996, IEE INSPEC © 2000 Institution of Electrical Engineers. All rights reserved. Dialog® File Number 2 Accession Number 5315970 1/f bulk phenomena noise theory for GaAs MESFETs Yan, K.T.; Forbes, L. Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA Conference: 1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. `Asia-Pacific Microelectronics 2000`. Proceedings (Cat. No.95CH35787) , Page: 111-14 Publisher: IEEE , New York, NY, USA , 1995 , xvi+499 Pages Conference: 1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. `Asia-Pacific Microelectronics 2000`. Proceedings , Sponsor: IEEE Hong Kong Sect., IEEE Asia-Pacific Region, IEEE Solid State Council, IEEE Electron. Devices Soc., IEE Hong Kong Centre, Hong Kong Inst. Eng , 6-10 Nov. 1995 , Hong Kong Language: English Order from Amazon.com Abstract: A 1/f noise model based on the distributed equivalent circuit technique for evaluating the semi-insulating substrate is proposed. Our model shows that the 1/f noise is a bulk phenomena with localized high frequency variations and long range low frequency fluctuations with the lowest frequency beingconstrained by the thickness of the material. (6 References) Subjects: 1/f noise equivalent circuits gallium arsenide III-V semiconductors Schottky gate field effect transistors semiconductor device models semiconductor device noise Theoretical Experimental 1/f bulk phenomena noise theory MESFETs 1/f noise model distributed equivalent circuit technique semi-insulating substrate localized HF variations long range LF fluctuations GaAs Other field effect devices Semiconductor device modelling and equivalent circuits © 1996, IEE INSPEC © 2000 Institution of Electrical Engineers. All rights reserved. Dialog® File Number 2 Accession Number 5262625 1/f noise of GaAs resistors on semi-insulating substrates Forbes, L.; Mun Seork Choi; Yan, K.T. Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA IEEE Transactions on Electron Devices , vol.43, no.4 , Page: 622-7 Publisher: IEEE , April 1996 Language: English Abstract: A new theory is used to analyze the 1/f noise of GaAs resistors on semi-insulating substrates. It is demonstrated that this model can explain previously published results at moderately high frequencies for, in this example, resistive filaments on semi-insulating GaAs substrates. The model is based on a distributed equivalent circuit representation of the substrate, and shows that 1/f noise is a bulk phenomenon associated with the high resistivity substrates. The 1/f noise is not associated with number or mobility fluctuations in the channel, nor surface effects. One consequence of the theory is that in this particular instance Hooge`s parameter is in reality no parameter, but is given by a simple formula which has a simple physical interpretation as the ratio of two charges: the thermal charge developed across the substrate capacitance and the charge associated with ionized donors in the resistor channel. (27 References) Subjects: 1/f noise equivalent circuits gallium arsenide III-V semiconductors resistors Schottky gate field effect transistors semiconductor device models semiconductor device noise substrates Theoretical 1/f noise GaAs resistors semi-insulating substrates model resistive filaments distributed equivalent circuit representation Hooge parameter thermal charge ionized donor charge substrate capacitance MESFET GaAs Other semiconductor devices Semiconductor device modelling and equivalent circuits Other field effect devices Resistors © 1996, IEE INSPEC © 2000 Institution of Electrical Engineers. All rights reserved. Dialog® File Number 2 Accession Number 5251676 On the theory of 1/f noise of semi-insulating materials Forbes, L. Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA IEEE Transactions on Electron Devices , vol.42, no.10 , Page: 1866-8 , Oct. 1995 Language: English Abstract: The 1/f noise phenomena associated with devices involving semi-insulating materials, for instance GaAs MESFET's on semi-insulating GaAs, has long been a perplexing problem. In this particular case the 1/f noise corner frequency can be up to 100 MHz before the mean square noise current at the drain is dominated by the Nyquist noise associated with the channel conductance. No reasonable explanation has ever been given, although there are many different theories. 1/f noise is a common phenomena in nature and other devicesinvolving semi-insulating materials. We propose here that this 1/f noise is a bulk phenomena associated with localized high frequency variations and long range low frequency fluctuations, the lowest frequency being limited only by the volume of the material. Specifically the proposal here is that injection of a current I into a semi-insulating material will result in a mean square noise voltage at the point of injection given by v/sub n//sup 2/=2(kT/q)q Delta fR( omega /sub c// omega ) Volts/sup 2/ where omega /sub c/=1/t/sub t/, for the radian frequencies, omega , larger than omega /sub c/ which is the reciprocal of the transit time of the carriers. For a long sample and long transit times then this 1/f noise voltage due to current injection will be larger than the Nyquist mean square noise of the sample alone as long as the DC voltage developed across the semi-insulating sample exceeds ((2kT/q)l/sup 2/( omega / mu ))/sup 1/2/. This theory then gives the 1/f or 1/ omega frequency dependence. The dc current I might be injected for instance by the substrate current in a GaAs MESFET being injected into the semi-insulating substrate, or gate current in an IGET being injected into thegate insulator. (11 References) Subjects: 1/f noise semiconductor materials Theoretical 1/f noise semi-insulating materials GaAs MESFETs corner frequency Nyquist noise channel conductance current injection Noise processes and phenomena in electronic transport Semiconductor theory, materials and properties © 1995, IEE INSPEC © 2000 Institution of Electrical Engineers. All rights reserved. Dialog® File Number 2 Accession Number 5068595 Hot-carrier induced series resistance enhancement model (HISREM) of nMOSFET's for circuit simulations and reliability projections Nam Hwang; Forbes, L. Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA Microelectronics and Reliability , vol.35, no.2 , Page: 225-40 , Feb. 1995 Language: English Abstract: This paper proposes a physically realizable reliability model of nMOSFET'sthat is applicable for reliability projections in IC design. We have devised a hot-carrier induced series (drain) resistance enhancement model (HISREM) which is based on the increase of the interface trapped charge ( Delta Nit) near the drain region and is physically realizable in circuit simulations of the hot-carrier induced degradation under operating conditions. The proposed HISREM requires only one parameter ( Delta Nit) for reliability projections in IC design without extraction of a set of stressed parameter files. The proposed HISREM shows a good agreement between the simulation results from SPICE and experiment data of the hot-carrier induced degradation ofdevice characteristics. The HISREM has been demonstrated by employing a NMOS inverter and a conventional CMOS operational amplifier. The HISREM is shown to be much simpler and more efficient for reliability projections in both digital and analog IC design rather than the commercial reliability simulator with parameter degradation models which require extraction of a set of stressed parameter files (i.e., Vto, gamma , mu /sub 0/, theta , V/sub max/, kappa ). (23 References) Subjects: hot carriers integrated circuit reliability MOS integrated circuits MOSFET semiconductor device models SPICE Theoretical hot-carrier induced series resistance enhancement model SPICE HISREM nMOSFETs circuit simulations reliability interface trapped charge hot-carrier induced degradation NMOS inverter CMOS operational amplifier analog IC design digital IC design Insulated gate field effect transistors Semiconductor device modelling and equivalent circuits Reliability Other MOS integrated circuits Computer-aided circuit analysis and design