PUBLICATIONS -

1. 1969 L. Forbes and C-T. Sah, APPLICATION OF THE DISTRIBUTED EQUILIBRIUM EQUIVALENT CIRCUIT MODEL TO SEMICONDUCTOR JUNCTIONS," IEEE Trans. on Electron Devices, Vol. ED-16, No. 12, pp. 1036-1041.

2. 1969 C-T. Sah, L. Forbes, L.L. Rosier, A.F. Tasch, Jr. and A.B. Tole, "THERMAL EMISSION RATES OF CARRIERS AT GOLD CENTERS IN SILICON," Applied Physics Lett., Vol. 15, No. 5, pp. 145-148.

3. 1969 C-T. Sah, L.L. Rosier and L. Forbes, "LOW-TEMPERATURE HIGH-FREQUENCY CAPACITANCE MEASUREMENTS OF DEEP- AND SHALLOW-LEVEL IMPURITY CENTER CONCENTRATIONS," Applied Physics Lett., Vol. 15, No. 6, pp. 161-164.

4. 1969 C-T. Sah, L.L. Rosier and L. Forbes, "DIRECT OBSERVATION OF THE MULTIPLICITY OF IMPURITY CHARGE STATES IN SEMICONDUCTORS FROM LOW-TEMPERATURE HIGH-FREQUENCY PHOTO-CAPACITANCE," Applied Physics Lett., Vol. 15, No. 10, pp. 316-318.

5. 1970 C-T. Sah, L. Forbes, L.L. Rosier and A.F. Tasch, Jr.,, "THERMAL AND OPTICAL EMISSION AND CAPTURE RATES AND CROSS SECTIONS OF ELECTRONS AND HOLES AT IMPERFECTION CENTERS IN SEMICONDUCTORS FROM PHOTO AND DARK JUNCTION CURRENT AND CAPACITANCE EXPERIMENTS," Solid State Electronics, Vol. 13, No. 6, pp. 759-788.

6. 1971 L. Forbes and C-T. Sah, "ON THE DETERMINATION OF DEEP LEVEL CENTER ENERGY AND CONCENTRATION BY THERMALLY STIMULATED CONDUCTIVITY MEASUREMENTS USING REVERSE-BIASED P-N JUNCTIONS," Solid State Electronics, Vol. 14, No. 2, pp. 182-183.

7. 1971 C-T. Sah, T.H. Ning, L.L. Rosier and L. Forbes, "PHOTO-THERMAL IONIZATION VIA EXCITED STATES OF SULPHUR DONOR IN SILICON," Solid State Communications, Vol. 9, No. 12, pp. 917-920.

8. 1971 C-T. Sah, L. Forbes, L.L. Rosier and A.F. Tasch, Jr., "THERMAL AND OPTICAL EMISSION RATES AND CROSS SECTIONS FROM IMPURITY PHOTOCURRENT AND PHOTOCAPACITANCE METHODS," Proc. of the Third Int'l. Photoconductivity Conf., pp. 253-258.

9. 1972 C-T. Sah, L. Forbes and W.W. Chan, "A NEW MODEL OF NEGATIVE PHOTOCURRENT," Science Bulletin of National Chiao-Tung University, Vol. V, No. 2, pp. 1-10.

PUBLICATIONS - (cont'd)

10. 1972 L. Forbes, "AUTOMATIC ON-CHIP THRESHOLD VOLTAGE COMPENSATION," IBM Technical Disclosure Bulletin, Vol. 14, No. 10, pp. 2894-2895.

11. 1972 L. Forbes and T.A. Williams, "FET HIGH-PERFORMANCE CIRCUIT AND FABRICATION TECHNOLOGY," IBM Technical Disclosure Bulletin, Vol. 14, No. 11, pp. 3400-3401.

12. 1972 L. Forbes, "HIGH PERFORMANCE CIRCUIT HAVING DEPLETION MODE AND ENHANCEMENT MODE FETs ON A SINGLE CHIP," IBM Technical Disclosure Bulletin, Vol. 15, No. 4, pp. 1143-1144.

13. 1972 L. Forbes, "PHOTODIODE HAVING ION IMLANT FOR IMPROVEMENT OF LIGHT SENSITIVITY," IBM Technical Disclosure Bulletin, Vol. 15, No. 9, pp. 1348-1350.

14. 1973 L. Forbes, "N-CHANNEL ION IMPLANTED ENHANCEMENT/DEPLETION MOSFETs," IEEE J. Solid-State Circuits, Vol. SC-8, No. 2, pp. 184-185.

15. 1973 L. Forbes, "N-CHANNEL ION IMPLANTED ENHANCEMENT/DEPLETION FET CIRCUIT AND FABRICATION TECHNOLOGY," IEEE J. of Solid-State Circuits, Vol. SC-8, No. 3, pp. 226-230.

16. 1973 H. Sakamoto and L. Forbes, "GROUNDED LOAD COMPLEMENTARY FET CIRCUITS; SCEPTRE ANALYSIS," IEEE J. Solid-State Circuits, Vol. SC-8, No. 4, pp. 282-284.

17. 1974 L. Forbes, J.R. Yeargan, D.L. Kuene and M.G. Craford, "CHARACTERISTICS AND POTENTIAL APPLICATIONS OF GaAs1-xPx MIS STRUCTURES," Solid State Electronics, Vol. 17, No. 1, pp. 25-29.

18. 1974 L. Forbes and C.K. Vaughn, "DEEP-LEVEL DEFECTS IN RED GaAs1-xPx LIGHT-EMITTING DIODES," Proc. IEEE, Vol. 62, No. 4, pp. 534-535.

19. 1974 L. Forbes and J.R. Yeargan, "DESIGN FOR SILICON INFRARED SENSING MOSFET," IEEE Trans. on Electron Devices, Vol. ED-21, No. 8, pp. 459-462.

20. 1974 L. Forbes and R.M. Fogle, "PHOTOCAPACITANCE INVESTIGATION OF DEFECTS IN GaAs0.6P0.4," Applied Physics Lett., Vol. 25, No. 3, pp. 152-155.

21. 1975 L. Forbes, "NON-RADIATIVE RECOMBINATION CENTERS IN GaAs0.6P0.4 RED LIGHT-EMITTING DIODES," Solid State Electronics, Vol. 18, No. 7, pp. 635-640.

PUBLICATONS - (cont'd)

22. 1975 W.C. Parker and L. Forbes, "EXPERIMENTAL CHARACTERIZATION OF GOLD-DOPED INFRARED-SENSING MOSFET'S," IEEE Trans. on Electron Devices, Vol. ED-22, No. 10, pp. 916-924.

23. 1975 L. Forbes and L.L. Wittmer, "EXPERIMENTAL VERIFICATION OF OPERATION OF THE INDIUM-DOPED INFRARED-SENSING MOSFET," IEEE Trans. on Electron Devices, Vol. ED-22, No. 12, pp. 1100-1101.

24. 1975 B.M. Hawkins and L. Forbes, "IDENTIFICATION OF COPPER ENERGY LEVELS IN GaAs0.6P0.4," Applied Physics Lett., Vol. 27, No. 12, pp. 695-697.

25. 1975 J.R. Yeargan, D.L. Crook, and L. Forbes, "PHOTOVOLTAIC ENERGY CONVERSION UNDER HIGH RADIATION INTENSITIES," Proc. of the Conf. on "Frontiers of Power Technology," Oklahoma State University, Stillwater, OK, Paper #13, October, pp. 1-17. 26. 1975 L.L. Wittmer, W.C. Parker, H. Elabd, K.W. Loh, J.R. Yeargan and L. Forbes, "THE INFRARED SENSING MOSFET," Proc. of the 1975 Int'l. Electron Device Mtng., pp. 510-513.

27. 1976 B.M. Hawkins and L. Forbes, "CHARACTERISTICS OF THE COPPER IMPURITY CENTER IN GaAs0.6P0.4," Proc. of the South Western IEEE Conf., pp. 101-105.

28. 1976 L. Forbes, L.L. Wittmer and K.W. Hoh, "CHARACTERISTICS OF THE INDIUM-DOPED INFRARED SENSING MOSFET (IRFET)," IEEE Trans. on Electron Devices, Vol. ED-23, No. 12, pp. 1272-1278, (Dec. 1976).

29. 1977 L. Forbes, K.W. Loh and L.L. Wittmer, "CHARACTERISTICS OF THE INDIUM- AND GALLIUM-DOPED SILICON INFRARED SENSING MOSFET'S (IRFET'S)," Proc. of the 2nd Int'l. Conf. on Solid-State Devices, Japanese J. of Applied Physics, Vol. 16-1, pp. 267-270, (Jan. 1977).

30. 1977 L. Forbes, "GOLD IN SILICON: CHARACTERIZATION AND INFRA-RED SETECTOR APPLICATIONS," The Gold Bulletin, published by the South African Chamber of Mines, Vol. 10, No. 2, pp. 49-53, (April 1977).

31. 1977 K.W. Loh, B.M. Hawkins, H. Elabd and L. Forbes, "CHARACTERISTICS OF THE GALLIUM-DOPED INFRARED SENSING MOSFET (IRFET)," IEEE Trans. on Electron Devices, Vol. ED-24, No. 8, pp. 1041-1048, (Aug. 1977).

32. 1979 L. Forbes, R. Brown, M. Sheikholeslam and K.W. Current, "APPLICATION OF THE MOSFET DEVICE STRUCTURE IN CHARACTERIZING IMPERFECTION CENTERS IN INDIUM-DOPED SILICON," Solid State Electronics, Vol. 22, pp. 391-397.

PUBLICATIONS - (cont'd)

33. 1979 G.F. Anderson, K.W. Current and L. Forbes, "ASSESSING GaAs HIGH SPEED SWITCHING JFET DEVICES MODELS: 1- VS. 2-DIMENSIONAL ANALYSIS," IEEE Proc., Vol. 67, No. 3, pp. 435, (March 1979).

34. 1979 L. Forbes and U. Kaempf, "CAPACITANCE AND CONDUCTANCE DEEP LEVEL TRANSIENT SPECTROSCOPY USING HP-IB INSTRUMENTS AND A DESKTOP COMPUTER," Hewlett-Packard J., Vol. 30, No. 4, pp. 29-32, (April 1979).

35. 1979 G.F. Anderson, K.W. Current and L. Forbes, "NONUNIFORMLY DOPED JFET-S FOR USE IN GaAs MESFET CIRCUITS: A SIMULATION," Proc. of 1979 Int'l. Symp. on Circuits and Systems, Tokyo, Japan, (July 1979).

36. 1979 L. Forbes, E. Sun, R. Alders and J. Moll, "FIELD INDUCED RE-EMISSION OF ELECTRONS TRAPPED IN SiO2," IEEE Trans. Electronic Device Lett., Vol. ED-26, No. 11, pp. 1816-1818, (Nov. 1979).

37. 1979 C.D. Chang, A. Damestani and L. Forbes, "IMPERFECTION CENTERS IN CHROMIUM AND OXYGEN DOPED GaAs," Solid-State Electronics (Notes), Vol. 22, No. 12, pp. 1053-1054, (Dec. 1979).

38. 1980 C.D. Chang and L. Forbes, "DARK CAPACITANCE, PHOTO-CAPACITANCE, DARK CONDUCTANCE, AND PHOTO-CONDUCTANCE TRANSIENTS ON GaAs MESFET's," Proc. Semi-Insulating III-V Materials Conf., Univ. of Nottingham, pp. 329-334, (April 1980).

39. 1981 J.W. Chen, R.J. Ko and D.W. Brzeznski; L. Forbes and C. Dell'Oca, "BULK TRAPS IN SILICON-ON-SAPPHIRE BY CONDUCTANCE DLTS," IEEE Trans. Electron Devices, Vol. ED-28, No. 3, pp. 299-304, (March 1981).

40. 1981 L. Forbes, J. Tillinghast, B. Hughes and C. Li, "AN AUTOMATED SYSTEM FOR THE CHARACTERIZATION OF HIGH RESISTIVITY SEMI-CONDUCTORS BY THE VAN DER PAUW METHOD," Rev. Sci. Inst., Vol. 52, No. 7, pp. 20-23, (July 1981).

41. 1981 A. Damestani and L. Forbes, "CHARACTERISTICS OF IRON AND NICKEL IN GaAsP," J. Elect. Materials, Vol. 10, No. 5, pp. 879-887, (1981).

42. 1981 C.D. Chang and L. Forbes; R. Zuleeg, "LONG TERM CONDUCTANCE TRANSIENTS ON GaAs JFET's," Proc. 1981 Int'l. Symp. on GaAs and Related Compounds, Inst. Phys. Conf. Series, No. 63, Chptr. 4, pp. 179-183, (1981).

43. 1983 C.Y. Kung, L. Forbes and J.D. Peng, "THE EFFECT OF CARBON IN THE FORMATION OF OXYGEN PRECIPITATES IN SILICON," Materials Res. Bulletin, Vol. 18, pp. 1437-1441, (1983).

PUBLICATIONS - (cont'd)

44. 1983 C.Y. Kung, L. Forbes and J.D. Peng, "THREE STEP ANNEALS AND OXYGEN PRECIPITATION IN THE HIGH CARBON CZ SILICON," Proc. Symp. on Defects in Silicon, Electro-Chem. Soc., Vol. 83-89, pp. 185-193, (1983).

45. 1983 L. Forbes, C.Y. Kung and J.D. Peng, "OXYGEN PRECIPITATION, DENUDED ZONES, INTRINSIC GETTERING AND GENERATION LIFETIMES ON (100) CZ SILICON," Proc. Symp. on Defects in Silicon, Electro-Chem. Soc., Vol. 83-89, pp. 229-235, (1983).

46. 1984 L. Forbes, P. Canfield, R. Gleason and A. McCamant, "LOW FREQUENCY NOISE ON GaAs FET'S AND HEMT's," Proc. Semi-Ins. III-V Materials Conf., Kah-Nee-Ta, OR, Shiva Publishing, pp. 392-396, (1984).

47. 1984 L. Forbes, F.E. Whitwer and J.D. Peng, "OXYGEN PRECIPITATION IN CMOS WAFER," Impurity Diffusion and Gettering in Silicon, MRS Vol. 36, pp. 257-262, (1984).

48. 1985 P. Canfield and L. Forbes, "GATE BIAS DEPENDENT, LOW FREQUENCY OSCILLATIONS IN GaAs MESFET'S," IEEE Elect. Dev. Lett., Vol. EDL-6, No. 5, pp. 227-228, (1985).

49. 1986 P. Canfield and L. Forbes, "SUPPRESSION OF DRAIN CONDUCTANCE TRANSIENTS, DRAIN CURRENT OSCILLATIONS AND LOW-FREQUENCY GENERATION-RECOMBINATION NOISE IN GaAs FET's USING BURIED CHANNELS," IEEE Trans. on Electron Devices, Vol. ED-33, No. 7, pp. 925-928, (1986).

50. 1986 M. Aminzadeh and L. Forbes, "FAST ZERBST TRANSIENT ANALYSIS AND APPLICATION TO INTRINSICALLY GETTERED P-TYPE EPITAXIAL WAFERS," Materials Issues in Silicon Integrated Circuits Processing, MRS Vol. 71, North-Holland, New York, pp. 59-71, (1986).

51. 1986 F.D. Whitwer, H. Haddad and L. Forbes, "DLTS CHARACTERIZATION OF PRECIPITATION INDUCED MICRODEFECTS," Materials Issues in Silicon Integrated Circuit Processing, MRS Vol. 71, North-Holland, New York, pp. 53-57, (1986).

52. 1986 W. Wijaranakula, P. Burke and L. Forbes; J.H. Matlock, "EFFECT OF PREANNEAL HEAT TREATMENT ON OXYGEN PRECIPITATION IN SILICON," Materials Issues in Silicon Integrated Circuits Processing, MRS Vol. 71, North Holland, New York, pp. 139-144, (1986).

53. 1986 W. Wijaranakula, P. Burke and L. Forbes; J.H. Matlock, "EFFECT OF PRE- AND POST-EPITAXIAL DEPOSITION ANNEALING ON OXYGEN PRECIPITATION IN SILICON," J. Materials Res., Vol. 1, No. 5, pp. 698-704, (1986).

PUBLICATIONS - (cont'd)

54. 1986 W. Wijaranakula, P. Burke and L. Forbes, "INTERNAL GETTERING HEAT TREATMENTS AND OXYGEN PRECIPITATION IN EPITAXIAL SILICON WAFERS," J. Materials Res., Vol. 1, No. 5, pp. 693-697, (1986).

55. 1986 P. Canfield and L. Forbes, "DRAIN CURRENT TRANSIENT SUPPRESSION IN BURIED CHANNEL GaAs MESFET's," Proc. of 4th Semi-Insulating III-V Materials Conf., Hakone, Japan, North-Holland, pp. 573-578, (1986).

56. 1986 W. Wijaranakula, P. Burke and L. Forbes, "IMPACT OF THE EPITAXIAL DEPOSITION PROCESS ON OXYGEN PRECIPITATION IN P+(100) SILICON," Proc. Symp. on Process Physics and Modeling for Semiconductor Technology, Electro-Chem Soc., Vol. 86, pp. 233-245, (1986).

57. 1987 L. Forbes and B. Rastegar, "A DESKTOP COMPUTER-BASED CALCULATION OF HIGH FREQUENCY MOS C-V CURVES," IEEE Trans. on Electron Devices, Vol. ED-34, No. 2, pp. 427-432, (1987).

58. 1987 W. Wijaranakula, H. Mollenkopf, J. Matlock, P. Burke and L. Forbes, "OXYGEN PRECIPITATION IN P/P+ EPITAXIAL SILICON MATERIAL," J. Electro-Chem. Soc., Vol. 134, No. 9, pp. 2310-2316, (1987)

59. 1987 P. Canfield, J. Medinger and L. Forbes, "BURIED CHANNEL GaAs MESFETs WITH FREQUENCY INDEPENDENT OUTPUT CONDUCTANCE," IEEE Electron Device Lett., Vol. EDL-8, No. 3, pp. 88-89, (1987).

60. 1987 P. Canfield and L. Forbes, "BURIED CHANNEL GaAs MESFETs WITH IMMUNITY TO IONIZING OPTICAL RADIATION EFFECTS," IEEE Electron Device Lett., Vol. EDL-8, No. 3, pp. 113-115, (1987).

61. 1988 P. Canfield and L. Forbes, "LATERAL N-P-N BIPOLAR TRANSISTOR ACTION IN GaAs," Solid-State Electronics, Vol. 31, pp. 123-125, (1988).

62. 1987 P. Canfield, J. Medinger, D.J. Allstot, L. Forbes, A.J. McCamant, B.A. Vetanen, B. Odekirk, E.P. Finchem and K.R. Gleason, "HIGH SPEED QUARTER MICRON BURIED-CHANNEL MESFET's WITH IMPROVED OUTPUT CHARACTERISTICS FOR ANALOG APPLICATIONS," Proc. 1987 IEEE Cornell Conf. on Advanced Concepts in High Speed Devices and Circuits, pp. 247. (1987).

63. 1988 M. Aminzadeh and L. Forbes, "RECOMBINATION LIFETIME OF SHORT BASE WIDTH DEVICES USING THE PULSED MOS CAPACITOR TECHNIQUE," IEEE Trans. on Electron Devices, Vol. ED-35, No. 4, pp. 518-521, (1988).

64. 1988 H. Haddad and L. Forbes, "ELECTRICAL ACTIVITY OF BULK STACKING FAULTS IN SILICON," Materials Lett., Vol. 7, pp. 94-107, (1988).

PUBLICATIONS - (cont'd)

65. 1989 H. Godbole, H. Haddad and L. Forbes, "PHOTOCAPACITANCE INVESTIGATION OF BULK STACKING FAULTS IN SILICON," Materials Lett., Vol. 8, pp. 201-203, (1989).

66. 1989 M.K. Lee, L. Forbes, T. Hallen and p. Tuinenga, "ANALYTICAL SELFBACKGATING GaAs MESFET MODEL INCLUDING DEEP-LEVEL TRAP EFFECTS," Ext. Abstracts Int. Electron Device Mtng., Washington, DC, pp. 315-318, (1989).

67. 1990 M.K. Lee, L. Forbes and T. Hallen, "DESIGN OF A GaAs OPERATIONAL AMPLIFIER USING A SELF-BACKGATING MESFET MODEL INCLUDING DEEP-LEVEL TRAP EFFECTS," Proc. IEEE Symp. on Circuits & Systems, New Orleans, LA, pp. 2287-2290, (May 1990).

68. 1990 H. Haddad, L. Forbes, P. Burke and W. Richling, "CARBON DOPING EFFECTS ON HOT ELECTRON TRAPPING," Proc. Int. Reliability Physics Symp., New Orleans, LA, pp. 288-289, (1990).

69. 1990 M.K. Lee and L. Forbes, "SCATTERING PARAMETER DEPENDENCE ON A TRANSIT TIME DELAY IN A SELF BACKGATING MESFET MODEL," Proc. 3rd Asia-Pacific Microwave Conf., pp. 541-544, (1990).

70. 1990 M.K. Lee and L. Forbes, "A SELF BACKGATING MESFET MODEL FOR LOW FREQUENCY ANOMALIES," IEEE Trans. on Elect. Devices, Vol. 37, No. 10, pp. 2148-2157, (1990).

71. 1991 S.S.B. Or, L. Forbes and H. Haddad, "THERMAL RE-EMISSION OF HOT ELECTRONS IN NMOS TRANSISTORS," IEEE Int'l. Symp. on Physical and Failure Analysis of Integrated Circuits, Singapore, pp. 76-80, (1991).

72. 1991 M.K. Lee, S.S.B. Or, N. Hwang and L. Forbes, "THERMAL SELF-LIMITING EFFECTS IN THE LONG TERM AC STRESS ON N-CHANNEL LDD MOSFET's," Proc. 9th Biennial Univ./Govt./Ind. Microelectronics Symp., Melbourne, FL, pp. 93-97, (1991).

73. 1991 S.S.B. Or, L. Forbes, H. Haddad and W. Richling, "ANNEALING EFFECTS OF CARBON IN N-CHANNEL LDD MOSFET's," IEEE Electron Device Lett., Vol. EDL-12, No. 11, pp. 596-598, (1991).

74. 1992 G.P. Imthurn, G.A. Garcia, H.W. Walker and L. Forbes, "BONDED SILICON ON SAPPHIRE WAFERS AND DEVICES," J. Appl. Phys., Vol. 72, No. 6, pp. 2526-2528, (1992).

75. 1992 D.Y. Ge, N. Hwang and L. Forbes, "A COMPOSITE N-MOSFET FOR MIXED-MODE AND ANALOG INTEGRATED CIRCUITS," Proc. Int. Elect. Device and Materials Symp., Taiwan, pp. 304-307, (Nov. 1992). PUBLICATIONS - (cont'd)

76. 1992 N. Hwang, S.S.B. Or, I. Kurachi and L. Forbes, "TUNNELING AND THERMAL EMISSION OF ELECTRONS AT ROOM TEMPERATURE AND ABOVE FROM A DISTRIBUTION OF DEEP TRAPS IN SiO2," Proc. Int. Elect. Devices and Materials Symp., Taiwan, pp. 559-562, (Nov. 1992).

77. 1993 S.S.B. Or, N. Hwang and L. Forbes, "TUNNELING AND THERMAL EMISSION FROM A DISTRIBUTION OF DEEP TRAPS IN SiO2," IEEE Trans. on Electron Devices, Vol. 40, No. 6, pp. 1100-1103, (June 1993).

78. 1993 D.Y. Ge, N. Hwang and L. Forbes, "COMPOSITE N-MOSFET FOR SUBMICRO-METRE CIRCUITS," IEE Electronics Lett., Vol. 29, No. 7, pp. 623-625, (April 1993).

79. 1993 E.N. Cartagena, G. Garcia, G. Imthurn, G. Kelley, H. Walker and L. Forbes, "BONDED ETCHBACK SILICON ON SAPPHIRE BIPOLAR JUNCTION TRANSISTORS," Proc. ECS 2nd Int'l. Symp. on Semiconductor Wafer Bonding Sci. Technol. & Appl., Electro-Chem. Soc., Vol. 93-9, pp. 1199-1200, (1993).

80. 1994 I. Kurachi, N. Hwang and L. Forbes, "PHYSICAL MODEL OF DRAIN CONDUCTANCE (gd) DEGRADATION DUE TO HOT CARRIER INJECTION," IEEE Trans. on Electron Devices, Vol. 41, pp. 964-969, (June 1994).

81. 1994 I. Kurachi, K.T. Yan and L. Forbes, "RELIABILITY CONSIDERATIONS OF HOT CARRIER INDUCED DEGRADATION IN ANALOGUE nMOSFET AMPLIFIER," IEE Electronics Letters, Vol. 30, No. 19, pp. 1568-1570, (15 Sept. 1994).

82. 1995 N. Hwang and L. Forbes, "HOT-CARRIER INDUCED SERIES RESISTANCE ENHANCEMENT MODEL (HISREM) OF nMOSFET'S FOR CIRCUIT SIMULATIONS AND RELIABILITY PROJECTIONS," Microelectronics and Reliability, Vol. 35, No.2, pp. 225-239, (1995).

83. 1995 L. Forbes, "ON THE THEORY OF 1/f NOISE OF SEMI-INSULATING MATERIALS," IEEE Trans. on Electron Devices, Vol. 42, No. 10, pp. 1866-1869, (Oct. 1995).

84. 1995 L. Forbes, K.T. Yan and M.S. Choi, "1/f NOISE CORNER FREQUENCY OF FET's ON SEMI-INSULATING SUBSTRATES," Ext. Abs. U.S. Conf. on GaAs Manufacturing Technology (MANTECH), New Orleans, pp. 52-55, (May 1995).

85. 1995 L. Forbes, B. Fieq and S. Savage, "RESONANT FORWARD-BIASED GUARD RING DIODES FOR SUPPRESSION OF SUBSTRATE NOISE IN MIXED-MODE CMOS CIRCUITS, IEE Electronics Letts., Vol. 31, No. 9, pp. 720-721, (April 1995).

PUBLICATIONS - (cont'd)

86. 1996 K.T. Yan and L. Forbes, "A MODEL FOR THE 1/f NOISE CORNER FREQUENCY OF FET's ON SEMI-INSULATING SUBSTRATES BASED ON BULK PHENOMENA," Solid-State Electronics, Vol. 39, pp. 857-61,(June 1996).

87. 1996 L. Forbes, M.S. Choi and L. Forbes, "1/f  NOISE OF GaAs RESISTORS ON SEMI-INSULATING SUBSTRATES," IEEE Trans. on Electron Devices, Vol. ED-43, pp. 622-627 , ( April 1996).

88. l999  L. Forbes, M.S. Choi and W. Cao, “1/f  NOISE IN BIPOLAR TRANSISTORS DUE TO TEMPERATURE FLUCTUATIONS IN HEAT CONDUCTION,”   Microelectronics Reliability,
Vol. 39, No. 9, pp. 1357-1364, Sept. 1999.

89. 1999   K.T. Yan, L. Forbes and S. Taylor, "A SIMPLE MODEL FOR THE CHANNEL NOISE COEFFICIENT OF FET's INCLUDING HOT ELECTRON EFFECTS,"  Microelectronics Reliability, Vol. 39, No. 12, pp. 1773-1786, Dec. 1999.

90. 2000  D. Xie and L. Forbes, "PHASE NOISE EFFECT ON A 2 GHz CMOS LC  OSCILLATOR," IEEE  Trans. on Computer Aided Design(TCAD), Vol.  19, No. 7 , pp. 773-778, July 2000.

91. 2000  D. Xie, M. Cheng  and L. Forbes, "SPICE MODELS FOR FLICKER NOISE IN
 N-MOSFET'S FROM SUBTHRESHOLD TO STRONG INVERSION," IEEE
 Trans. on Computer Aided Design(TCAD),vol. 19, no. 11, pp. 1293-1303,  Nov. 2000.

92.  2000  L. Forbes, M. Cheng and J. Zhou : " SIMULATION OF PHASE NOISE
GENERATED BY WHITE NOISE IN 1.7GHZ CMOS LC OSCILLATOR" ,
IEE Electronics Letters, Vol.36, No. 23, pp. 1909-1911, 2000.

93.  2001  J. Zhou, M. Cheng and L. Forbes, "SPICE MODELS FOR FLICKER NOISE
IN P-MOSFET'S  IN THE SATURATION REGION," IEEE Trans. on Computer
Aided Design(TCAD),  vol. 20, no. 6, pp. 763-767,  2001.

94. 2002  L. Forbes, C.W. Zheng and B.L. Zhang, “EXPERIMENTAL VERIFICATION OF
THE DEPENDENCE OF BIPOLAR  TRANSISTOR FLICKER NOISE ON
POWER DISSIPATION,” IEEE Trans. on Electron Devices, vol. 49, no. 5, pp.945-46, 2002.

95. 2002  L. Forbes, C. W. Zhang, B. L. Zhang and I. Chandra, “COMPARISON OF PHASE NOISE SIMULATION TECHNIQUES ON A  BJT   LC OSCILLATOR,” Proc. 2002 Midwest Symp.on Circuits and Systems, Tulsa OK,
 pp. I 551-554.

96. 2002  L. Forbes, and I. Chandra, “ NEW PI-MODEL OF BIPOLAR TRANSISTOR NOISE FOR CIRCUIT ANALYSIS AND SIMULATION & TECHNIQUE TO REDUCE PHASE NOISE IN BIPOLAR OSCILLATORS,” Proc. 2002 Midwest Symp. on Circuits and Systems, Tulsa OK, , pp. III 188-191.

97. 2002  C.W.  Zhang and L. Forbes, “TIMING JITTER IN A 1.35-GHZ SINGLE-ENDED RING OSCILLATOR,” Proc. 2002 Midwest Symp. on Circuits and Systems, Tulsa OK, pp.  III 308-311.

98. 2002  X.Y. Wang, C.W. Zhang and L. Forbes,  “AN INVESTIGATION OF TIMING JITTER IN BIPOLAR ECL RING OSCILLATORS,” Proc. 2002 Midwest Symp. on Circuits and Systems, Tulsa OK, pp. III 617-620.

99. 2003  L. Forbes, C. W. Zhang, B. L. Zhang and I. Chandra, “COMPARISON OF PHASE NOISE
       SIMULATION TECHNIQUES ON A BJT LC OSCILLATOR,” IEEE Transactions
       On Ultrasonics, Ferroelectrics, and Frequency Control, vol. 50, no. 6, pp. 716-719, 2003.

100. 2003  L. Forbes, “THEORY FOR HOOGE'S EQUATION BASED ON TEMPERATURE  FLUCTUATIONS,”
         1st  Int. Symp. On Fluctuations and Noise, Santa  Fe, NM,  1-4 June 2003, pp. 435-440.

101. 2003  L. Forbes and C.W. Zhang ,“1/f  NOISE AND CLOCK JITTER IN DIGITAL ELECTRONIC
          SYSTEMS,” Proc. 1st  Int. Symp. On Fluctuations and Noise, Santa  Fe, NM, 1-4 June 2003,
           pp. 168-180.

102. 2003  L. Forbes, X.Y. Wang, and C.W. Zhang, “TEMPERATURE  FLUCTUATIONS AND
          l/f  NOISE IN ELECTRON DEVICES,”  University, Industry, Government
          Microelectronics Symposium, Boise, Idaho, June 2003, pp. 353-355.

103.  2003 C.W.  Zhang and L. Forbes, “SIMULATION OF TIMING JITTER IN RING OSCILLATORS,”
          University, Industry, Government  Microelectronics Symposium, Boise, Idaho, June 2003, pp. 356-359.

104.  2004 C.W. Zhang, X.Y. Wang, and L. Forbes, “l/f  NOISE AND TIMING JITTER IN ELECTRONIC
         OSCILLATORS,” IEE Proceedings G – Circuits, Devices and Systems, Vol.151, No.4,
          pp. 184-189,  April 2004.

105.  2004 R. Darapu, C.W. Zhang and L. Forbes, "ANALYSIS OF JITTER IN CLOCK DISTRIBUTION
         NETWORKS,"  Workshop on Microelectronics and Electron Devices, Boise, Idaho, 16 April 2004, pp. 45-47.

106. 2004 C.W. Zhang, M.Y. Louie and L. Forbes, "MOSFET  l/f  NOISE MEASUREMENT UNDER
         SWITCHED BIAS CONDITIONS, "Workshop on Microelectronics and Electron Devices, Boise,
         Idaho, 16 April 2004, pp. 79-81.

107.  2005 Chengwei Zhang and Leonard Forbes, “SIMULATION OF TIMING JITTER IN SINGLE-
           ENDED RING OSCILLATORS, “ IEEE Trans. Inst. & Meas., submitted

108. 2005 M.Y. Louie and L. Forbes, "LONG TERM TRANSIENTS IN MOSFET  1/f  NOISE  UNDER
        SWITCHED  BIAS CONDITIONS, " Workshop on Microelectronics and  Electron Devices,  Boise,
         Idaho, 15 April, 2005, pp. 55-58.

109. 2005 L. Forbes, H. Gopalakrishnan, and W.  Wanalertlak,  “SIMULATION AND ANALYSIS OF NOISE
        IN SWITCHED CAPACITOR AMPLIFIER CIRCUITS," Workshop on Microelectronics and  Electron
        Devices,  Boise, Idaho, 15 April, 2005, pp.99-102.

110.  2005 M.Y. Louie and L. Forbes, "MOSFET  1/f   NOISE   UNDER SWITCHED  BIAS CONDITIONS,"
           Proc. 3rd  Int.  Symp. On Fluctuations and Noise, Austin, TX, 23-25 May, 2005, pp. 215-225.

111. 2005 L. Forbes, H. Gopalakrishnan, and W.  Wanalertlak,  “ANALYSIS AND SIMULATION OF NOISE
        IN CORRELATED DOUBLE SAMPLING IMAGER CIRCUITS," Proc. 3rd  Int.  Symp. On Fluctuations
        and  Noise, Austin, TX, 23-25 May, 2005, pp. 239-247.

112. 2005  M.Y. Louie, D.A. Miller, M.E. Jacob and L. Forbes, "LONG TERM TRANSIENTS IN MOSFET  1/f
             NOISE   WITH  SWITCHED BIAS,  IEEE  Device Research Conference, Santa Barbara, CA,
             20-22 June 2005, pp. 79-80.

113. 2006 L. Forbes, M. Mudrow and W. Wanalertlak, “Thermal noise and bit error rate limits in nanoscale memories,”
          IEE Electronics Letters, Vol. 42, No. 5, pp. 279-280, 2 March 2006.

114. 2006 M. Mudrow, W.  Wanalertlak and L. Forbes, "THERMAL NOISE LIMITS IN NANOSCALE ELECTRONICS,"
          IEEE Workshop on Microelectronics and Electron Devices, Boise, 14 April 2006, pp. 39-40.

115. 2006 W. Wanalertlak, M.Y. Louie, and L. Forbes, "POWER DISSIPATION AND TEMPERATURE VARIATIONS IN
         NANOSCALE DEVICES," IEEE Workshop on Microelectronics and Electron Devices, Boise, 14 April 2006, pp. 43-44.

116. 2006 L. Forbes , W.  Wanalertlak, and M.Y. Louie, "Technique for time and frequency dependent solutions of the diffusion
        equation: application to temperature of  nanoscale  devices," NanoTech, Boston, 7-11 May 2006, Vol. 1, pp.665-668.

117. 2006 L. Forbes , M. Mudrow and W.  Wanalertlak, "Thermal noise and bit error rate limits in nanoscale memories,"
         NanoTech, Boston, 7-11 May 2006, Vol. 3, pp.78-81.

118. Drake A. Miller, Panupat Poocharoen and Leonard Forbes, "SUBTHRESHOLD LEAKAGE DUE TO 1/F NOISE
        AND RTS(RANDOM TELEGRAPH SIGNALS)," IEEE Workshop on Microelectronics and Electron Devices, Boise, 20 April 2007, pp. 23-24.                         

119.  Drake A. Miller, Panupat Poocharoen and Leonard Forbes, "1/f NOISE AND RTS(RANDOM TELEGRAPH SIGNAL) ERRORS IN
          SENSE AMPLIFIERS,"  IEEE Workshop on Microelectronics and Electron Devices, Boise, 20 April 2007, pp. 22-22.

120.  L. Forbes, D.A. Miller and P. Poocharoen, "1/f Noise and RTS(Random Telegraph Signal) Errors in Comparators and Sense Amplifiers,"
              NanoTech, Santa Clara CA, 2007, vol. 1 pp. 197-200

121.   L. Forbes, D.A. Miller and M.Y. Louie, "1/f Noise and RTS(Random Telegraph Signals) and Read Errors in Nanoscale  Memories,"
                NanoTech, Santa Clara CA, 2007, vol. 1 pp. 156-159

122.   L. Forbes, D.A. Miller and M.Y. Louie, "Single Election Trapping in Nanoscale Transistors; RTS(Random Telegraph Signals) and l/f Noise,"
               NanoTech, Santa Clara CA, 2007, vol. 4 pp. 569-562

123.  M.Y. Louie and L. Forbes, “Long Term Transients in MOSFET 1/f Noise with Switched Bias,” Open Electrical and Electronic Engineering Journal,
                vol. 1, pp. 51-53 , 2007.

124.  L. Forbes and D.A. Miller, “A percolation model for Random Telegraph Signals in Metal-Oxide-Silicon Field Effect Transistor drain current and threshold voltage distributions,”  Appl. Phys. Lett., Vol. 93, No. 4,  pp. 043517-1-3 , 28 July 2008.

125.   Leonard Forbes ,  Drake  A. Miller and  Michael  E.  Jacob, “Low Capacitance Electrical Probe for Nanoscale Devices and Circuits,”
            Open Nanoscience Journal, vol. 2, pp.39-42, 2008.

126.   Michael Jacob, Drake Miller, and Leonard Forbes, “Ultra low capacitance high frequency IC probe,” Proc. SPIE, Vol. 7042, No. 704203, 9 pages, 2008.

127.  D.A. Miller, M.E. Jacob, L. Forbes, "Compact Model of Low - Frequency Noise in Nanoscale Metal-Oxide-Semiconductor Field Effect
        Transistors,"Technical Proceedings of the 2009 Nanotechnology Conference and Trade Show, Volume 3  Workshop on Compact Modeling,
          pp. 632-635, 2009.

128.    L. Forbes, D.A. Miller, M.E. Jacob, "Atomistic Electrostatic Simulations Using Spice, "   Technical Proceedings of the 2009 Nanotechnology
          Conference and Trade Show, Volume 1, pp 606-609, 2009.

129. L. Forbes and D.A. Miller," Characterization of Single Electon Effects in Nanoscale MOSFET's," Proc. SPIE, Vol. 7402, pp. 740201-1 to -8, 2009

130.  L. Forbes, and M.Y. Louie, "Backside Nanoscale Texturing to Improve IR Response of Silicon Photodetectors
                                                                                                                                                and Solar Cells,"  Nanotech  , Vol. 2 , pp. 9 - 12, 2010.